Vollständigkeit der Einbindungen prüfen
Altera-FPGA Produkte
| Open–Source
|
Nios II Soft Prozessor (Nios II Embedded Design Suite (EDS)) •
Nios V RISC V Soft Prozessor (Quartus Prime Pro Edition Version ab 21.3.)
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| Hardware
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| HIGH Range
|
| Agilex (2035)
|
Agilex 7 F-Series, I-Series, M-Series
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| Gen 10 (2035)
|
Stratix 10 SX SoC •
Stratix 10 (DX, MX, TX, GX)
|
|
| MID Range
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| Agilex (> 2040)
|
Agilex 5 D-Series, E-Series
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| Gen 10 (2035)
|
Arria 10 SoC SX •
Arria 10 (GX, GT)
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| Gen 10 (2040)
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Cyclone 10 GX
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| Gen 5 (2035)
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Arria V SoC (SX, ST) •
Arria V (GX, GT, GZ)
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| Gen 5 (2040)
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Cyclone V SoC (SE, SX, ST) •
Cyclone V (E, GX, GT)
|
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| LOW Range
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| Agilex (> 2040)
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Agilex 3
|
| Gen 10 (2040)
|
MAX 10 •
Cyclone 10 LP
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| Gen 4 (2040)
|
MAX V (CPLD) •
Cyclone IV (E, GX)
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| Gen 2/3 (2040)
|
MAX II (CPLD) •
Cyclone III
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|
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| Software
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| Hardware Development
|
Intel Quartus Prime Design Software •
FPGA Intellectual Property
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| Embedded Development
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Nios V Processor •
SoC Embedded Development Suite •
Platform Designer •
Intel HLS Compiler
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| System Development
|
FPGA AI Suite •
DSP Builder •
Intel FPGA SDK for OpenCL
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| Full Stack Development
|
OFS Open FPGA Stack
|
|
Altera-FPGA Produkte mit Angabe zur Langzeitverfügbarkeit
